Signal processing device and method for operating a signal processing device

ABSTRACT

A signal processing device implemented in a semiconductor body includes a frequency conversion device and a converter connected to the frequency conversion device. The conversion device is coupled by a terminal to a terminal on the surface of the semiconductor body. One terminal of the converter is connected to a terminal node of the signal processing device. A signal generator, which is connected by its signal output to a local oscillator input of the frequency conversion device, has a control input for setting its operating point. Furthermore, a control circuit is provided. In this case, an output of the control circuit is connected to the control input of the signal generator. Depending on internal signals which identify an operating state of the signal processing device, the control circuit generates a regulating signal at the output. The operating point of the signal generator is thereby set in such a way that a current consumption of the signal processing device is reduced, so that the signal quality is ensured in a sufficient manner.

The invention relates to a signal processing device for radiofrequency signals. The invention furthermore relates to a method for operating a signal processing device.

Signal processing devices, in particular radiofrequency transceivers, are used inter alia in mobile communication devices which have only a limited supply of energy, usually in the form of a battery or a rechargeable battery. Therefore, the requirement exists for a low current consumption of such transceivers, in order to increase the so-called service life of mobile communication devices. In the case of radiofrequency transceivers, the current consumption is particularly dependent on the operating point of the individual switching components of a transceiver. In this case, the term operating point defines that region of the family of characteristic curves of the circuit component which is used in operation of the circuit component. The operating point is determined by a supply voltage, a supply current or a programming voltage.

In addition to the current consumption, the operating point also influences the system properties of the transceiver. Thus, by way of example, the operating point of the circuit components of a receiver front end of a transceiver influences the noise figure and also the signal/noise ratio of a received and partly processed signal. The operating point of a receiver amplifier in a transceiver can alter the linearity of a reception amplifier and thus lead to distortions.

Linearity and signal/noise ratio are of particular importance for the data transmission quality.

Operating points in circuit components of the transmitter influence the transfer response during the signal processing and thus the output power and also the frequency spectrum of the output signal.

In order to ensure error-free operation even under unfavorable conditions, for example in the case of small input signals and high external temperatures, it is necessary to choose the operating points suitably for such conditions. As a result, under favorable conditions more current is consumed than would be necessary to achieve the required properties with regard to the signal quality.

In modern radiofrequency transceivers and signal processing devices, the operating points of individual circuit components are therefore programmed suitably or predefined for a critical case. One example of a programming of a radiofrequency transceiver via the baseband unit—connected in the transceiver—by means of a three-conductor bus is shown by the document U.S. Pat. No. 5,994,931. Via this interface, by way of example, the operating point of the input amplifiers of the transceiver is set and the current consumption is thus reduced depending on input signals. The signals transmitted via the interface are generated by a control circuit in this case. For this purpose, however, it is necessary to assess signals representing states of the transceiver. In the context of the increasing integration density and the desire to integrate as many switching components as possible in a semiconductor body, the construction with a three-conductor bus and external control circuits means additional space requirement and costs.

One object of the invention is to further reduce the current consumption of a signal processing device in particular of a radiofrequency transceiver. A further object of the invention is to provide a method by means of which a signal processing device can be operated in low-power fashion.

These objects are achieved by means of the subject matters of the independent patent claims 1, 28 and 32.

In one aspect of the invention, the signal processing device contains at least two processing elements. The latter are each embodied for assuming one of at least two operating states that can be assumed for a signal processing of useful signals fed in in a manner dependent on a control signal. A signal processing of circuit components of the signal processing device is thus carried out, it being possible to provide different operating modes or modes of operation for this depending on the type of signal processing. Furthermore, the processing device comprises at least one device for detecting a parameter of the signal processing device. Said parameter identifies an operating state of the signal processing or else alternatively a property of the useful signal. Finally, an evaluation device is embodied for generating the control signals in a manner dependent on an evaluation of the detected parameter.

By means of the invention, operating parameters of individual circuit components are set, preferably for optimizing a power consumption of the processing device. According to the invention, the regulation is effected on account of on-chip signals or states.

In one aspect of the invention, the signal processing device, which may be formed in a semiconductor body, comprises a terminal on a surface of the semiconductor body. The terminal may be embodied for being coupled to an antenna. A terminal node is formed for coupling to a baseband signal unit for processing of digital signals. A frequency conversion device having a first terminal, having a second terminal and having a local oscillator input is connected between the terminal and the terminal node of the signal processing device. Specifically, the first terminal of the frequency conversion device is coupled to the terminal of the signal processing device. A signal generator having a reference input, a control input for setting its operating point and a signal output is connected by the signal output to the local oscillator input of the frequency conversion device. Finally, a control circuit is provided, which is embodied for providing a regulating signal at an output depending on at least one control signal. The control signal may represent a state of the signal processing device but also a property of a useful signal provided for the signal processing. Furthermore, the output of the control circuit is connected to the control input of the signal generator.

In accordance with the principle posed, the operating point of the signal generator is set for operation as a local oscillator by means of the control circuit, by the regulating signal output by the latter. By virtue of the setting of the operating point of the signal generator, the latter is optimized with regard to its current consumption. The amplitude and the noise of its output signal, which is used as local oscillator signal, also change at the same time. Given suitable useful signals, preferably given useful signals having high levels, the amplitude of the local oscillator signal and thus the current consumption of the signal generator can be suitably reduced by setting the operating point without the useful signal quality being significantly impaired by the thus increased noise. This measure reduces the power loss of the signal processing device.

A further advantage consists in the fact that an operating state of the signal processing device is evaluated within the semiconductor body by means of the control circuit. The power consumption is advantageously regulated in this way without further external control signals. Preferably, the control signal represents a temperature of the semiconductor body. As an alternative, the control signal identifies a supply voltage of the device, an input signal level, a desired output level or a modulation method. In a further embodiment, the control signal represents a value of a signal/noise ratio of an input signal, a quality of the reception signal, an amplitude of an interference signal, or the value of an adjacent channel power.

In one aspect, a converter is provided, which is coupled to the second terminal of the frequency conversion device and to the terminal node of the signal processing device. The converter is embodied for converting analog signals into digital signals or for converting digital signals into analog signals.

In one advantageous refinement of the invention, a low-pass filter is connected between the second terminal of the frequency conversion device and the converter. In one embodiment, the low-pass filter is embodied as an active filter having an actuating input, to which can be fed a regulating signal for setting the operating point of the low-pass filter for operation of the filter. The actuating input of the low-pass filter is coupled to the output of the control circuit.

In one development of the invention, the converter is formed as a digital-to-analog converter. In one embodiment of the invention, the digital-to-analog converter comprises an actuating input coupled to the output of the control circuit. The digital-to-analog converter is embodied for converting a digital signal into a corresponding analog signal with a first resolution or at least a second resolution depending on an actuating signal at the actuating input. In other words, in this embodiment, it is possible to set the resolution of the digital-to-analog converter, the bit width, the algorithmic complexity and/or the clock rate of the digital signal processing by means of a corresponding regulating signal of the control circuit at the actuating input of the digital-to-analog converter. As a result, preferably, in the case of digital input signals which have a large amplitude, it is possible to reduce the resolution and thus the current consumption of the digital-to-analog converter.

In another embodiment of the invention, the converter is embodied as an analog-to-digital converter. In one development, the analog-to-digital converter has an actuating input coupled to the output of the control circuit. The analog-to-digital converter is embodied for converting an analog signal into a digital signal with a first resolution or with at least a second resolution depending on an actuating signal at the actuating input of the analog-to-digital converter. In one preferred embodiment, it is possible to regulate the resolution, the bit width and/or the clock rate in the digital signal processing of the analog-to-digital converter depending on an actuating signal at the actuating input of the converter.

In another embodiment, an amplifier having a variable gain is connected between the terminal of the signal processing device and the frequency conversion device. As an alternative, the amplifier is embodied for setting its current consumption and also noise figure and/or its linearity. Preferably, said amplifier has a regulating input for setting its operating point, which is connected to the output of the control circuit. By changing the operating point of the amplifier, it is possible to achieve a reduction of the power consumption of the entire signal processing device. In one expedient embodiment, the amplifier is embodied in the semiconductor body as an integrated circuit. As an alternative, it is formed as an external amplifier outside the semiconductor body.

In another development, a level detector is arranged between the amplifier and the frequency conversion device, said level detector being embodied for determining a signal level and for outputting a level signal to the control circuit. In this embodiment, the level signal to the control circuit represents the at least one parameter by means of which the control circuit provides the regulating signal at its output. Consequently, depending on the signal level of a signal, the power regulator generates a regulating signal for setting the operating point and thus for reducing the power consumption of the signal processing device.

In one embodiment of the invention, the frequency conversion device of the signal processing device is embodied as I/Q demodulator with a first and a second frequency mixer embodied for image frequency rejection. In this refinement, the signal processing device thus forms a reception device for radiofrequency signals.

In another embodiment, the frequency conversion device of the signal processing device is embodied as an I/Q modulator with a first and a second frequency mixer. These frequency mixers are preferably also formed with image frequency rejection. In the embodiment with an I/Q modulator, the signal processing device forms a transmission device for radiofrequency signals.

In another refinement of the invention, the signal generator comprises a phase locked loop containing a voltage controlled oscillator. The voltage controlled oscillator has a regulating input for setting its operating point. The regulating input of the voltage controlled oscillator is connected to the control input of the signal generator.

In one refinement, a digital-to-analog converter is connected between the regulating input of the voltage controlled oscillator and the control input of the signal generator, and converts a digital regulating signal present at the control input of the signal generator into an analog signal and feeds it to the regulating input of the voltage controlled oscillator for setting its operating point.

In another development of the invention, the voltage controlled oscillator is connected to an amplifier on the output side. An output of the amplifier forms the signal output of a signal generator. The amplifier has a regulating input connected to the control input and serving for setting its operating point. In these refinements, the power consumption of the signal generator is controlled by means of a regulating signal at its actuating signal by means of the setting of the operating points of individual circuit components of the signal generator. In one preferred embodiment, the voltage controlled oscillator is embodied for regulating its supply current in a manner dependent on a signal present at the control input of the signal generator.

With regard to the method, the object is achieved by means of a method for operating a signal processing device, comprising the steps of:

-   -   providing a signal processing device having a frequency         conversion device, and a signal generator;     -   applying a signal to be processed to the frequency conversion         device;     -   determining at least one parameter which identifies an operating         state of the signal processing device;     -   generating a control signal in a manner dependent on the         parameter;     -   controlling the power consumption of the signal generator with         the control signal;     -   generating a local oscillator signal;     -   and converting the signal to be processed with the local         oscillator signal.

The invention involves determining a parameter which identifies an operating state of the signal processing device and controlling the power of the signal generator depending on this. Consequently, the power consumption of the entire signal processing device is regulated in a suitable manner depending on the parameter. By way of example, a temperature of the signal processing device, a supply voltage for operation, an input signal level, is determined. The control signal is then generated therefrom. Accordingly, internal states of the signal processing device are preferably evaluated. The method is suitable particularly for devices which are realized as integrated circuits in a semiconductor body in which an evaluation of states of the device and the regulation are effected completely within the semiconductor body and so there is no need for additional signals to be passed out of or into the semiconductor body.

The subclaims relate to further advantageous refinements of the invention. The invention is explained in detail below with the aid of the drawings, in which:

FIG. 1 shows a first exemplary embodiment of the signal processing device in the form of a radiofrequency receiver,

FIG. 2 shows a second exemplary embodiment of the signal processing device, here as a radiofrequency transmitter,

FIG. 3 shows an exemplary embodiment of the phase locked loop with settable operating point,

FIG. 4 shows a refinement of a voltage controlled oscillator,

FIG. 5 shows a flip-flop circuit with settable power consumption,

FIG. 6 shows an embodiment of an I/Q demodulator with a frequency divider circuit,

FIG. 7 shows an illustration of a semiconductor body in which the signal processing device is realized.

FIG. 7 shows a semiconductor body in which the signal processing device is implemented. The semiconductor body is formed from silicon, for example, but other semiconductor materials such as gallium arsenide or silicon-germanium are also suitable. The individual switching elements are then integrated into such a semiconductor. A CMOS technology, by way of example, is suitable for this, but so, too, is a pure n-MOS or p-MOS technology. The individual switching elements and assemblies are produced for example by lithographic methods and various implementation techniques. Various techniques for producing large scale integrated circuits in semiconductors are known.

The semiconductor body 100 has a plurality of terminal contacts, which are also referred to as contact pads, on its surface. They are formed from a metal, often applied by vapor deposition, and have only a low resistance in order to enable good electrical contact-connection. The contact pads on the main side 101 a also form the terminals of the signal processing device integrated in the semiconductor body. They include the contact pads 100 b, for example, which are formed in a manner suitable for feeding in or for outputting radiofrequency signals. Other contact pads, for example 100 c, carry digital baseband signals. Further terminals 990, 991 serve for feeding in supply current and supply voltage and external control signals 992, 993 for setting a special operating mode.

FIG. 1 shows a block diagram of one embodiment of the signal processing device 1 according to the invention in the form of a reception device in a mobile communication device. In this case, the reception device is embodied as an integrated circuit in the semiconductor body 100 in accordance with FIG. 7. The arrows illustrated indicate the direction of propagation of a signal in the signal processing device.

The construction of the signal processing device by means of an integrated circuit in the semiconductor body makes it possible to directly process various internal generated signals and to control the entire power consumption of the individual circuit components of the signal processing device on the basis of said signals. Therefore, an external controller is only partly necessary. Internal signals of this type are for example the temperature, the operating voltage, the operating current and the signal power.

The embodiment illustrated here is connected by a first terminal 1 b to an antenna 4 for receiving and feeding in a radiofrequency signal. The terminal 1 b simultaneously forms the contact pad 100 b on the main side 101 a of the semiconductor body 100.

The output terminals 1 c of the signal processing device are formed by the contact pads 100 c on the main side 101 a of the semiconductor body 100 in accordance with FIG. 7. Connected to them is a baseband unit 8, which is embodied for processing digital signals and generates therefrom a data stream RX data at the output 15. In this exemplary embodiment, the baseband unit 8 is arranged outside the semiconductor body, that is to say that the contact pads 100 c lead to the inputs of the baseband unit 8. It is nevertheless possible, as an alternative, for the baseband unit also to be formed within the semiconductor body 100. The baseband unit 8 then forms a part of the signal processing device according to the invention, the output 15 being formed by a contact pad on the main side 101 a of the semiconductor body.

The signal processing device 1 according to the embodiment contains a signal path arranged between the first terminal 1 b and the second terminal 1 c. Specifically, the terminal 1 b is coupled to the input of a reception amplifier 3 within the semiconductor body. The reception amplifier is embodied with particularly low noise and has a settable operating point. The output of the reception amplifier 3 is connected to a level detector 11 and to the input of an I/Q demodulator 5.

FIG. 6 shows one embodiment of the I/Q demodulator, which is formed as an integrated circuit in the semiconductor body. The demodulator is connected by its input 55 to the inputs of two mixers 53 and 54. In each case a local oscillator signal component I, Q is fed to the two frequency mixers 53 and 54. Said signal components are provided by a frequency divider 52 a, which divides a local oscillator signal present at its input 52 by the factor four and generates therefrom a signal having two components I and Q that are phase-offset by 90° with respect to one another. One of the two components I is fed to the first frequency mixer 54 at its local oscillator input, and the other component Q is fed to the second frequency mixer 53.

The two frequency mixers convert a signal present on the input side to an intermediate frequency with the aid of the respective local oscillator signal components and output it at the output 51. Owing to the property of the phase offset of the two local oscillator components I and Q, this operation is also referred to as I/Q demodulation.

The outputs 51 of the I/Q demodulator 5 are connected to a respective further level detector 12 and 12 a and also to a respective low-pass filter 6 and 6 a. A bandpass filter can also be used instead of a low-pass filter. The outputs of the two low-pass filters 6 and 6 a are connected to further level detectors 13, 13 a and to the inputs of two analog-to-digital converters 7 and 7 a. The latter generate a digital value from a signal present on the input side and output said digital value at the output.

The outputs of the two analog-to-digital converters are connected to the terminals 1 c of the signal processing device, which, for their part, are coupled to the baseband unit 8. The baseband unit is embodied as a signal processor unit and processes the digital signals. In this case, the two components I′, Q′ now present as digital values are demodulated and a data stream is generated which contains the demodulated information of the signal present at the first terminal 1 b.

The power consumption of the signal processing device according to the invention can be controlled depending on the input power of the signal fed in via the antenna 4 and to the input amplifier 3. For this purpose, level detectors 11, 12, 12 a and 13, 13 a are provided at various points; they determine the level of the analog signal and forward it to a control circuit 9. Items of information relating to the converted digital value are likewise also fed to the devices 14 and 14 a and to the power regulator 9.

In addition, temperature sensors 93 are present in various regions of the semiconductor body; they determine the temperature there and forward this to the control circuit 9. The temperature represents an important parameter for a good operating point setting and thus a power consumption. It is expedient, therefore, to provide the temperature sensors 93 in spatial proximity to the circuit component of the signal processing device in the semiconductor body whose operating point is intended to be regulated by means of correspondingly assessed signals.

The control circuit 9 determines from the individual values control parameters by means of which the operating point of individual circuit components can be altered, a sufficient signal quality being ensured. As a result, the current consumption of the signal processing device in the semiconductor body is reduced in a suitable manner, as a result of which the power loss also decreases. In the present exemplary embodiment, the control circuit 9 outputs a correspondingly digital regulator signal at its output 92 to a signal generator 2, the analog-to-digital converters 7 and 7 a and also the digital signal processor 8.

With this regulating signal at its control input 21 the signal generator 2 sets anew its operating point for generating a local oscillator signal and thus its operating behavior. It is connected by its local oscillator output 22 to the local oscillator input 52 of the frequency conversion device. The operating point of individual circuit components of the signal generator 2 is thus changed depending on the regulating signal at the actuating input 21. The current consumption and thus the power loss are changed, for example reduced, the signal quality furthermore being sufficient for the processing. In the event of a change in the operating points of individual components of the signal generator 2, the amplitude of the local oscillator signal at the output 22 also changes.

This means in concrete terms that for high levels of a signal present on the input side, a current consumption of the local oscillator is reduced by altering the operating point. As a result of the change in the operating point, the signal generator 2 is operated in a region with lower power consumption but also greater noise. The greater noise may be disregarded, however, with respect to the gain on account of the lower power consumption.

The regulating signal of the control circuit 9 is likewise fed to the two analog-to-digital converters 7 and 7 a. In a manner dependent thereon, the analog-to-digital converters reduce their resolution, their bit width and/or the clock rate for the digital signal processing. Changes in a plurality of these parameters are likewise possible. A reduction of the resolution and/or of the clock rate for the digital signal processing also reduces the current consumption of the converters. However, only few additional errors occur despite the reduction of the resolution or the clock rate of the digital signal processing on account of the high input signal. Through the active control of the analog-to-digital converters the power consumption and thus the power loss can be reduced without generating additional errors during the conversion and significantly reducing the signal quality.

In the same way, it is also possible to reduce the power loss in a transmission device by suitable setting of the operating points of the various circuit components. FIG. 2 shows such an example of a signal processing device 1 a which is embodied as a transmission device and is likewise implemented in a semiconductor body. Operationally or functionally identical components bear the same reference symbols.

The transmission device additionally has a baseband unit 8 implemented in the semiconductor body 100 in accordance with FIG. 7. The input terminal 15 a is embodied as a contact pad on the main side of the semiconductor body. The items of information to be transmitted are applied to said input terminal as digital data. The baseband unit 8 generates digital values therefrom in accordance with a modulation specification. Said digital values are fed to the node 1 c connected to digital-to-analog converters 7 b and 7 c. The two digital-to-analog converters 7 b, 7 c convert the digital signals present at the terminals 1 c into analog signals. They are subsequently fed via a low-pass filter 6 b, 6 c to the inputs of an I/Q modulator 5 a. The low-pass filters serve for suppressing undesirable higher-order frequency components that arise as a result of the conversion in the two converters.

The I/Q modulator 5 a is constructed in a similar manner to the I/Q demodulator in accordance with FIG. 6. It, too, contains two mixers 53 and 54 and also a frequency divider which divides the signal present at the local oscillator input of the I/Q modulator 5 a by the factor 4 and provides two components I and Q. One of the components in each case is fed to the local oscillator input of one of the two frequency mixers. With the aid of the two components I, Q, the analog baseband signals filtered by the low-pass filters 6 b and 6 c are converted to the output frequency, then added and provided at the output 55. The output 55 is connected to an output amplifier 3 a having a variable gain.

In this exemplary embodiment, too, a control unit 9 is provided in the semiconductor body. The latter contains a plurality of inputs 91 a to 91 d at which signals representing different internal states of the signal processing device and of the semiconductor body are present. These are on the one hand a temperature, a supply voltage, an operating mode but also the power to be output and the type of modulation used by the baseband unit 8. The control circuit 9 generates a plurality of regulating signals from these parameters and outputs them at its output 92. The output 92 is in turn connected to the signal generator 2, and the digital-to-analog converters 7 b and 7 c. Furthermore, it is connected to an actuating input of the output amplifier 3 a for setting the operating point thereof.

Furthermore, the low-pass filters 6 b and 6 c in each case also contain an actuating input 61 b and 61 c for setting their operating point. An actuating signal is likewise fed to a regulating input 52 a of the I/Q modulator for operating point settings thereof within the frequency divider and the individual mixers. The power loss can be reduced by the setting of the operating points of the low-pass filters, of the I/Q modulator and of the output stages, a sufficient signal quality remaining ensured at the same time.

FIG. 3 shows a block diagram of a signal generator 2 as is implemented in the semiconductor body. The signal generator 2 is embodied as a phase lock loop. For this purpose, it contains a phase detector 26 having a reference input 262 and a feedback input 261. A reference signal having a reference frequency f_(ref) is fed in at the reference input 262. Said reference signal is provided by a resonant circuit 10 as shown for example in FIG. 1 and FIG. 2. The resonant circuit 10 is distinguished by a particularly accurate and constant oscillation and is situated outside the semiconductor body. The terminals 23 and 23 a for the phase locked loop 2 are formed as contact pads 230 and 230 a on the main side 101 a of the semiconductor body.

The signal output by the resonant circuit 10 is amplified at the input 23 by means of an amplifier 29 and applied to the input 262. It is simultaneously fed back to the resonant circuit 10 again via a deattenuation amplifier 29 a and the output 23 a.

The phase detector 26 compares the phases of the signals present at the two inputs 261 and 262 and generates an actuating pulse therefrom, and feeds said actuating pulse to the input 271 of a device 27 comprising charge pump and loop filter. In this case, the actuating pulse is a measure of a phase deviation of the signals present at the inputs 261 and 262. The charge pump and the loop filter are indicated here by means of a parallel-connected capacitor and an impedance connected into the signal path.

The output of the device 27 is connected to the control input 241 of the voltage controlled oscillator 24. On the basis of an actuating signal at the input 241, the voltage controlled oscillator generates an output signal at its output 242. Said output signal is fed in a feedback path to an input 251 of a frequency divider 25. The output of the frequency divider is in turn connected to the input 261 of the phase detector 26.

Moreover, the output of the voltage controlled oscillator 24 is connected to a buffer amplifier 28. The latter amplifies the oscillator signal and outputs it at the output 22 of the signal generator circuit 2.

In order to reduce the power consumption of the signal generator 2, the actuating input 21 is coupled to the frequency divider 25, to the voltage controlled oscillator 24 and also to the buffer amplifiers 28. Thus, by way of example, the buffer amplifier 28 contains an actuating input 281 for setting its operating point. The operating point and thus also the gain and the power loss of the buffer amplifier 28 can be set on the basis of these regulating signals. For this purpose, the actuating input 281 of the buffer 28 is connected to the actuating input 21 via a digital-to-analog converter 291. The regulating signal fed to the actuating input is converted into an analog actuating signal by the digital-to-analog converter 291 and fed to the input 281 for setting the operating point.

The voltage controlled oscillator 24 likewise also has an actuating input for setting its operating point. This input, too, is connected to the actuating input 21 via a digital-to-analog converter. The deattenuation amplifier 29 has an actuating input connected to the input 21. Via this input it is possible to set the operating point and thus the current consumption of the deattenuation amplifier.

FIG. 4 shows a refinement of a voltage controlled oscillator 24 in which the operating point can be set by regulating the supply current. In this case, the voltage controlled oscillator 24 is indicated with a deattenuation amplifier 241 a and also a tunable capacitance element 241 b, which together with a coil 241 c forms a resonant circuit. The deattenuation amplifier 241 a, which is formed from two cross-coupled field effect transistors, serves for the deattenuation and compensation of the attenuating portions of the resonant circuit comprising the coil 241 c and the tunable capacitance element 241 b. The capacitance element 241 b is tuned by means of the signal at the actuating input 241 of the voltage controlled oscillator 24 in accordance with FIG. 3.

Output nodes of the voltage controlled oscillator are in each case radiofrequency-coupled via two capacitors 246 and 246 a and connected to a setting voltage V_(common) via a resistor in each case. The voltage serves for controlling an output buffer embodied as a differential amplifier 244. Specifically, a first output node of the voltage controlled oscillator is connected to the control terminal of a first field effect transistor of the differential amplifier 244, and the second output node of the voltage controlled oscillator is in each case connected to the control terminal of the other field effect transistor of the differential amplifier. Output taps Q and Q′ of the differential amplifier form the output of the voltage controlled oscillator.

Two further control transistors 242 and 242 a are in each case provided for regulating the operating point. The control transistors are connected between the supply potential V_(DD) and the node 242 b in the resonant circuit and, respectively, the node 242 c of the differential amplifier 244. They are connected by their control terminals to the actuating input 243. Therefore, the operating point of the voltage controlled oscillator and also of the output buffer is set by controlling the conductivity of the two transistors 242 and 242 a.

FIG. 5 shows a further embodiment of a circuit component of the signal processing device whose supply current or supply voltage can be regulated by means of the actuating signal. This is a detail from a frequency divider circuit of the I/Q modulator and I/Q demodulator in accordance with FIG. 1 and FIG. 2 and also a circuit 25 in accordance with FIG. 3. In this case, the frequency divider circuit is embodied as feedback master-slave flip-flop. The operating point is set via two control transistors 242 and 242 a connected between the master-slave flip-flop and the ground potential 248. The control terminals of the two transistors 242 and 242 a are again connected to the regulating input 52 a.

Parameters that identify operation of the signal processing device are determined in the signal processing device. In this case, it is possible to use purely on-chip signals or to assess states such as temperature or operating voltage. It is likewise possible, as illustrated in FIG. 1, to determine levels of an input signal by means of various level detectors at different points within the signal path, and to transfer them to the control circuit.

Regulating signals for an optimum power consumption in conjunction with good signal quality are determined therefrom by the control circuit 9. The individual operating points of the various circuit components of the signal processing device are subsequently set. An action externally for example by transmission of additional parameters is not necessary.

LIST OF REFERENCE SYMBOLS

-   1: Transmission device -   1 a: Reception device -   1 b, 1 c: Terminals -   2: Signal generator -   3: Reception amplifier -   3 a: Output amplifier -   4: Antenna -   5: I/Q demodulator -   5 a: I/Q modulator -   6, 6 a, 6 b, 6 c: Low-pass filters -   7, 7 a: Analog-to-digital converters -   7 b, 7 c: Digital-to-analog converters -   8: Digital signal processor -   9: Power regulator -   10: Reference oscillator -   11, 12, 12 a, 13, 13 a: Level detectors -   14, 14 a: Devices -   15: Digital signal output -   15 a: Digital signal input -   21: Actuating input -   22: Local oscillator output -   23: Reference signal input -   23 a: Reference signal output -   24: Voltage controlled oscillator -   25: Frequency divider -   26: Phase detector -   27: Loop filter, charge pump -   28: Buffer amplifier -   29: Frequency counter circuit -   30: Feedback path -   52: Local oscillator input -   51: Terminals -   55: Terminal, terminal point -   52 b: Frequency divider -   53, 54: Frequency mixers -   93: Temperature sensor -   100: Semiconductor body -   100 b, 100 c: Contact pads -   101 a: Main side -   241 a: Deattenuation amplifier -   241 b: Capacitance element -   241 c: Coil -   242: Transistors -   262: Reference input -   261: Feedback input -   281, 251, 243: Actuating input -   291: Digital-to-analog converter -   990, 991, 992, 993: Contact pads -   Q, Q′: Data output -   VDD: Supply voltage -   CLK, CLK′: Clock signal 

1. A signal processing device for radiofrequency signals comprising: a terminal; a terminal node for coupling to a baseband signal unit; a frequency conversion device, which comprises a first terminal, a second terminal and a local oscillator input and is coupled by its first terminal to the terminal of the signal processing device; a signal generator, which has a reference signal input and a control input for setting an operating point of the signal generator and is connected by a signal output to the local oscillator input of the frequency conversion device (5); a control circuit, which is connected to the control input of the signal generator on the output side and is configured to generate a regulating signal at an output depending on at least one signal fed to the control circuit, the signal fed thereto representing a state of the signal processing device or a property of a useful signal in the signal processing device.
 2. The signal processing device as claimed in claim 1, in which the signal generator is configured to generate a local oscillator signal from a reference signal present at the reference signal input.
 3. The signal processing device as claimed in claim 1, further comprising: a converter, which is coupled to the second terminal of the frequency conversion device and to the terminal node, wherein the converter is configured to convert analog signals into digital signals or digital signals into analog signals.
 4. (canceled)
 5. The signal processing device as claimed in claim 1, in which the signal fed to the control circuit characterizes at least one of the following states: a temperature in at least one partial region of the signal processing device; a supply voltage or a supply current of the signal processing device; a level of a signal fed in at the terminal or at the terminal node of the signal processing device; a level of a signal to be output by the signal processing device; an adjacent channel power; a signal/noise ratio of an analog input signal; an amplitude of an interference signal; and a quality of a reception channel.
 6. The signal processing device as claimed in claim 1, further comprising a filter connected between the second terminal of the frequency conversion device and the converter.
 7. The signal processing device as claimed in claim 6, wherein the filter comprises an active filter having an actuating input for setting the operating point of the filter, and the actuating input of the filter is coupled to the output of the control circuit.
 8. The signal processing device as claimed in claim 3, wherein the converter comprises a digital-to-analog converter.
 9. The signal processing device as claimed in claim 8, wherein the digital-to-analog converter has an actuating input coupled to the output of the control circuit, and wherein the digital-to-analog converter is configured to operate in at least one of the following operating modes: conversion of a digital signal into an analog signal with a first resolution or at least a second resolution depending on an actuating signal at the actuating input; and alteration of a clock rate of a clock signal for operation of the digital-to-analog converter in a manner dependent on the actuating signal at the actuating input.
 10. The signal processing device as claimed in claim 3, wherein the converter comprises an analog-to-digital converter.
 11. The signal processing device as claimed in claim 10, wherein the analog-to-digital converter has an actuating input coupled to the output of the control circuit, and the analog-to-digital converter is is configured to operate in at least one of the following operating modes: conversion of an analog signal into an digital signal with a first resolution or at least a second resolution depending on an actuating signal at the actuating input; and alteration of a clock rate of a clock signal for operation of the analog-to-digital converter in a manner dependent on the actuating signal at the actuating input.
 12. The signal processing device as claimed in claim 1, further comprising an amplifier having a variable gain is connected between the terminal of the signal processing device and the frequency conversion device.
 13. The signal processing device as claimed in claim 12, wherein the amplifier comprises a regulating input for setting an operating point of the amplifier, which is connected to the output of the control circuit.
 14. The signal processing device as claimed in claim 13, wherein a level detector arranged between the amplifier and the frequency conversion device, said level detector is configured to determine a signal level and output a level signal to the control circuit.
 15. The signal processing device as claimed in claim 3, further comprising a level detector arranged between the frequency conversion device and the converter wherein the level detector is configured to determine a signal level and output a level signal to the control circuit.
 16. The signal processing device as claimed in claim 1, wherein the frequency conversion device comprises an IQ demodulator with a first and a second frequency mixer, wherein the first and second frequency mixers are configured to provide image frequency rejection.
 17. The signal processing device as claimed in claim 1, wherein the frequency conversion device comprises an IQ modulator with a first and a second frequency mixer, wherein the first and second frequency mixers are configured to provide image frequency rejection.
 18. The signal processing device as claimed in claim 1, wherein the frequency conversion device comprises a frequency divider circuit, which is connected, on the input side, to the local oscillator input for frequency division of an oscillator signal provided thereto.
 19. (canceled)
 20. (canceled)
 21. The signal processing device as claimed in claim 1, wherein the signal processing device comprises a reception device or a transmission device for radiofrequency signals.
 22. (canceled)
 23. The signal processing device as claimed in claim 1, wherein the signal generator comprises a phase locked loop containing a voltage controlled oscillator.
 24. The signal processing device as claimed in claim 23, wherein the voltage controlled oscillator has a regulating input for setting its operating point, which is connected to the control input.
 25. The signal processing device as claimed in claim 23, wherein the voltage controlled oscillator is connected, on the output side, to an amplifier, the output of which forms the signal output of the signal generator and which has a regulating input coupled to the control input and serving for setting its operating point.
 26. The signal processing device as claimed in claim 23, wherein the voltage controlled oscillator is configured to regulate its supply current in a manner dependent on a signal present at the control input of the signal generator.
 27. The signal processing device as claimed in claim 1, further comprising a temperature sensor configured to output a temperature signal from a temperature in at least one part of the signal processing device to the control circuit.
 28. (canceled)
 29. A signal processing device, comprising: at least two processing elements each configured to assume one of at least two operating states that can be assumed for a signal processing of useful signals fed in in a manner dependent on a control signal; at least one device configured to detect a parameter of the signal processing device which identifies an operating state of the signal processing; and an evaluation device configured to generate the control signals in a manner dependent on an evaluation of the detected parameter.
 30. The signal processing device as claimed in claim 29, wherein the detected parameter is derived from: a temperature in at least one partial region of the signal processing device; a supply voltage or a supply current of the signal processing device; a level of the useful signal fed in; a level of a signal to be output by the signal processing device; an adjacent channel power of the useful signal fed in; a signal/noise ratio of the useful signal fed in; an amplitude of an interference signal in the useful signal fed in; or a quality of a reception channel in the useful signal fed in.
 31. The signal processing device as claimed in claim 30, wherein the at least one of the at least two processing elements is configured to set its operating point in a manner dependent on the control signal.
 32. The signal processing device as claimed in claim 30, wherein the evaluation device is formed for generating configured to generate the control signal in such a way that, under a predefined quality of the signal processing, a total power consumption of the at least two processing elements is minimal.
 33. A method for operating a signal processing device, comprising the steps of: providing a signal processing device having a frequency conversion device, a signal generator; applying a signal to be processed to the frequency conversion device; determining at least one parameter which identifies an operating state of the signal processing device; generating a control signal in a manner dependent on the parameter determined; setting an operating point of at least one block for operation with the control signal, the block comprising at least one of the following elements: the signal generator, the frequency conversion device; generating a local oscillator signal by means of the signal generator; converting the signal to be processed with the local oscillator signal.
 34. The method as claimed in claim 33, wherein when providing the signal processing device, the signal processing device comprises a converting device operated in clocked fashion to convert analog signals into digital signals or digital signals into analog signals.
 35. The method as claimed in claim 33, wherein the setting step comprises changing a resolution of the converting device or changing a clock rate for operating the converting device.
 36. The method as claimed in claim 33, wherein determining at least one parameter comprises at least one of the following steps: determining a temperature; determining a signal level of the signal to be processed; determining a supply voltage of the signal processing device; determining an adjacent channel power; determining a reception signal quality; determining an interference signal power; and determining a signal/noise ratio of the received signal. 